The present invention relates to a semiconductor device having a metal wire layer and a passivation film in the uppermost layer and a method of manufacturing the semiconductor device. More particularly, it relates to improvement in the structures of a bonding pad and a surface protecting film.
In accordance with recent refinement of a semiconductor device, there are increasing demands for a semiconductor device having a multilayer wiring structure for increasing a density of each chip and increasing an operation speed. Now, an example of a conventional semiconductor device having the multilayer wiring structure will be described.
FIG. 18 is a sectional view for illustrating the structure in the vicinity of the uppermost wires of the conventional semiconductor device. In FIG. 18, a semiconductor substrate and elements such as a transistor disposed thereon are omitted. Also, a semiconductor substrate generally bears interlayer insulating films and metal wires in several layers, but these elements are also omitted in FIG. 18, so as to show merely uppermost metal wires 12, an interlayer insulating film 11 formed under the metal wires 12 and elements formed on them.
As is shown in FIG. 18, on the underlying interlayer insulating film 11 are formed the uppermost metal wires 12 by stacking a Ti film and the like, and a surface protecting film 21 is formed so as to cover the underlying interlayer insulating film 11 and the metal wires 12. In this case, the surface protecting film 21 is a multilayer film including an underlaying insulating film 19 of a thin silicon film and a passivation film 14 of a silicon nitride film. Furthermore, a bonding pad 15 formed out of the same metal film as the metal wires 12 is provided. The surface protecting film 21 is provided with an opening 21a of several tens μm square, so that external electrical connection can be generally attained through the bonding pad 15 exposed within the opening 21a.
FIGS. 19(a) and 19(b) are sectional views for showing manufacturing procedures for the conventional semiconductor device. First, as is shown in FIG. 19(a), the metal wires 12 and the bonding pad 15 are formed on the underlaying interlayer insulating film 11. Then, as is shown in FIG. 19(b), the underlying insulating film 19 and the passivation film 14 are successively deposited on the interlayer insulating film 11 and the metal wires 12. Thereafter, the underlying insulating film 19 and the passivation film 14 are patterned, so as to form the opening 21a as is shown in FIG. 18. Thus, the structure of the semiconductor device as shown in FIG. 18 can be obtained.
Such a conventional structure of the semiconductor device has, however, the following problems: The silicon nitride film for forming the passivation film 14 in the uppermost layer is required to be deposited under conditions of a temperature lower than the melting point of the metal film. Therefore, it is necessary to adopt CVD in plasma atmosphere or the like, which is poor in the step coverage, and hence, it is difficult to attain a good burying characteristic in an area with a small pitch between the wires. As a result, a coverage defect is caused particularly in a concave step portion as is shown in FIG. 20(a), and hence, a defect in reliability due to moisture absorption can be disadvantageously easily caused. On the other hand, another problem occurs when merely the passivation film 14 of the silicon nitride film with a large dielectric constant is formed on the substrate without forming the underlying insulating film so as to improve the moisture absorption resistance as is shown in FIG. 20(b). In this case, in accordance with the refinement of elements, an insulating film with a large dielectric constant is filled in the area between the metal wires with a small pitch. Therefore, a parasitic capacity between the wires is increased in the uppermost layer, resulting in disadvantageously increasing a wiring delay.
In addition, as is shown in FIG. 21, moisture absorption through the underlying insulating film 19 exposed within the opening 21a on the bonding pad 15 can cause a similar problem.
Such a problem owing to the moisture absorption can be more and more serious in a semiconductor device of the next generation, in which a silicon oxide film doped with fluorine and an organic SOG film having a small dielectric constant and high moisture absorption resistance are to be introduced in stead of the silicon nitride film as the passivation film so as to suppress the increase of a parasitic capacitance.